{
  "video_id": "reddit_1vjketg",
  "channel_slug": "programming",
  "channel_handle": "r/programming",
  "title": "Assembly Hall of Shame: Racing to the bottom of CPU performance",
  "url": "https://www.reddit.com/r/programming/comments/1vjketg/assembly_hall_of_shame_racing_to_the_bottom_of/",
  "external_url": "https://github.com/xoreaxeaxeax/asm-hall-of-shame",
  "upload_date": "20260809",
  "published_at": "2026-08-09T08:27:04+00:00",
  "transcript": "\n\n--- Top Comments ---\n\n\n[300 upvotes] I would never have guessed that 62 seconds for a single instruction was possible without outright cheating like disabling the core it's scheduled on. Incredible stuff.\n\n[89 upvotes] The PDP-10 has indirect addresses that were automatically dereferenced.  This was repeated if the resulting address was an indirect address.  So, you could fill memory with a linked list of indirect addresses and any instruction could walk all of memory before completing.\n\n[71 upvotes] This one is diabolical:  https://github.com/xoreaxeaxeax/asm-hall-of-shame/tree/main/split_lock\n\nNot only is it horrendously slow on its own but it locks up the memory bus for _all_ other cores while it's executing. \n\nMoral of the story: unaligned memory accesses are not \"almost free\" as some would have you believe.",
  "transcript_chars": 825,
  "ingested_at": "2026-08-11T13:30:27.592459+00:00",
  "source": "reddit",
  "yt_meta": {
    "score": 524,
    "upvote_ratio": 0.97,
    "num_comments": 53,
    "author": "f311a",
    "is_self": false
  }
}